Device-memory epoch cancellation
A four-byte high-priority copy to a device epoch can provide prompt cancellation while preserving P8 throughput.
Diagnostic work, exact algebra and local capabilities are not treated as end-to-end mining advantage.
What was tested?
A four-byte high-priority copy to a device epoch can provide prompt cancellation while preserving P8 throughput.
Why the test is meaningful
Moving the epoch to VRAM avoids coherent host-memory reads, but checking it in the nonce loop can still add enough global-load pressure to erase a small throughput margin.
retention=throughput(epoch)/throughput(P8)response=t_observed−t_signalgates: retention≥0.999 and response≤15 msHow it was tested
Use exact P8 SHA-256d, update a four-byte device epoch on a high-priority stream, and run 24 balanced benchmarks plus four cancellation trials with sealed binaries.
What happened
All four signals were observed, but responses were 0.111671–0.113157 s. Retention was 0.999326 with CI95 0.998860–0.999792 and the candidate was favorable on 0/4 headers.
Exactness and statistical controls
B32 and factor checks passed; the kernel used 46 registers with zero spills. Both latency and statistical retention gates were evaluated as registered.
What the result means
Device residence removes the catastrophic mapped-host penalty, but per-nonce checking is still too slow to react and too costly to promote.
Limitations
- Only one copy/control design was tested.
- The interval crosses the 0.999 retention gate.
- Results are local to one GPU and runtime.
Evidence trail
Repeat the frozen P8 baseline and device-epoch candidate over the same equal-work paired design, recording signal and observed timestamps independently.
Canonical variants
CANONICAL-EXP-163PREREGISTERED-CAMPAIGNSEALED-AUDITSource: internally audited canonical reports. Local filesystem structure, private headers and operational identifiers are excluded from publication.